Regarding the technical field of the conventional flash memory, the architecture of flash memory includes a flash memory chip having a plurality of physical flash memory planes. Further, one of physical flash memory planes is composed of hundreds of flash memory blocks wherein the memory capacity of a flash memory block is in a range from 16 KB to 128 KB.
Please refer to FIG. 1. FIG. 1 is a management architecture of the conventional flash memory. There are many kinds of management methods of the flash memory. However, while implementing the management methods, it is required to establish a mapping table (abbreviated as “MT”, or named as address translation table) having logical addresses (LAS) and physical addresses (PAS) in the flash memory. Furthermore, before using the flash memory, it is necessary to construct a mapping table and store the mapping table in the random access memory (RAM) to be inquired so that the flash memory can be operated in the manner of management architecture shown in FIG. 1. However, considering the manufacturing cost of the flash memory, the capacity of the random access memory (RAM) is limited. Thus, if the storage space for storing the mapping table is greater than the physical storage space of the random access memory (RAM), the management method of the flash memory needs to be changed.
Please refer to FIG. 2. FIG. 2 is a flow chart of management method of the conventional flash memory. The management method adopts the way of on-demand fetching. That is, when the host submits an inquiry request, the management method constructs a mapping table partially associated with the inquiry request, or fetches the mapping table partially associated with the inquiry request to be stored in the random access memory (RAM). The management method then starts to inquire the mapping table. Therefore, it is not necessary to save the whole mapping table to the random access memory (RAM). The detailed steps are described as follows:
(1A) Start.
(2A) The host issues an access command to access the flash memory and assigns a logical access address.
(3A) The method checks the partial mapping table stored in the random access memory (RAM).
(4A) The method identifies the partial mapping table to check whether the information corresponding to the logical access address is stored. If yes, go to step (5A), and if no, proceed to step (4A1).
(4A1) The method constructs the partial mapping table having the information corresponding to the logical access address or reads the partial mapping table from the flash memory.
(4A2) The method saves the partial mapping table to the random access memory (RAM) to be inquired. If the capacity of the random access memory (RAM) is exhausted, the temporarily unused portion of the partial mapping table is erased.
(5A) The method inquires the mapping table to acquire the physical addresses corresponding to the logical access address.
(6A) The method access the flash memory based on the physical addresses.
(7A) End.
However, for the purpose of decreasing the access response time by reducing the time of the on-demand fetching when constructing the partial mapping table, it is required to divide the mapping table into a plurality of regions and only a portion of regions correspond to a specific range of physical memory addresses. While the host reads the data on the specific range, the specific range of physical memory addresses is scanned in order to construct the partial mapping table including the specific range of physical memory addresses.
As shown in FIG. 3, a plurality of logical blocks having a smaller address range corresponds to a flash memory plane having a greater address range. For example, a flash memory plane is composed of the amount of 512 physical memory blocks (PBA), which are assigned as the numbers “0” to “511”. A plurality of logical blocks (LAB) are assigned as the numbers “0” to “499” and total amount of logical blocks is 500. The logical blocks (LAB) corresponds to the physical memory blocks. The additional twelve physical memory blocks serves as the function of out-place update or as a buffer region if some bad blocks are located within the physical memory blocks (PBA). The term of out-place update means that the new data is written to different regions for reducing the updated time when updating a new memory block. The bad clocks are native defects in the flash memory after the flash memory are manufactured or used. FIG. 3 shows the partial mapping table in the mapping table to be inquired by the logical blocks (LAB) including numbers “0” to “499”.
If the host accesses a block, e.g. number “496”, in the logical block (LAB) and the mapping table shown in FIG. 3 is not stored in the random access memory (RAM), it is required to scan numbers “0” to “511” of the physical memory blocks (PBA) in the flash memory for constructing the mapping table within the random access memory (RAM). Then, the host inquires the mapping table and identifies that the data of the number “496” in the logical block (LAB) is stored in the number “69” of the physical memory blocks (PBA). Finally, the data of the number “69” in the physical memory blocks (PBA) can be accessed.
The feature of the above-mentioned method is only applicable to the random access memory (RAM) with the limited capacity. The disadvantage is that it takes a lot of time to make on-demand fetching or scan the flash memory for constructing different partial mapping tables when the addresses accessed by the host are variable from time to time. Moreover, such situation becomes more severe if the capacity of the flash memory is increased.
Additionally, within the physical memory blocks (PBA) of the partial mapping table, if the amount of bad blocks in the physical memory blocks (PBA) is greater than the amount of the effective blocks in the partial mapping table, some logical blocks (LAB) cannot correspond to the addresses of the physical memory blocks (PBA), thereby resulting in data-storing errors of the flash memory. Further, the file system of the flash memory is damaged and all the data are thus lost. For example, if there are twelve or more bad blocks of the physical memory blocks (PBA) in the flash memory plane, the above situation occurs.